I am quite new to Vivado and Vitis, but I am working on implementing a design that includes BRAM. The BRAM is in my block design and shows up in my XSA file inside the platform in Vitis, but in the xparameters.h file in my application component, the XPAR_BRAM_... definitions aren't there. I tried added a led to see if it would autogenerate the parameters for that and it did. I'm at a standstill and I can't find anyone else having the same problem. I'm using the newer Vitis Unified ide v. 2023.2.1. I was thinking about trying to use inferred BRAM but with my need to communicate with the Zynq processor I feel like AXI may be harder to implement.
Heres a picture of my XSA: Hardware Export
and my block design: Block Design
and if it helps the implementation showing the block ram as well: Implementation
and the only errors warnings I'm receiving are from the timing summary, but the design still generates a bitstream.
Thanks in advance.
I've tried changing the address space the BRAM is being assigned. I've tried deleting the block ram generator and ctrl IP and adding them again.
I am able to write manually to the bram without needing the drivers or anything by just using some Xil_Out32 and Xil_In32 functions and defining the addresses that I allocated to it manually.
#include "xil_io.h"
#include <stdio.h>
#include <xil_types.h>
#include "xil_printf.h"
#define BRAM_BASE_ADDRESS 0x40000000
#define BRAM_HIGH_ADDRESS 0x40003fff
int main()
{
xil_printf("DEVICE STARTED\n");
u64 input = (u64)0x48656c6c6f212121;
Xil_Out64(BRAM_BASE_ADDRESS, input);
u64 data = Xil_In64(BRAM_BASE_ADDRESS);
for (;;) {
printf("DEVICE DATA: %llu\n", data);
}
return 0;
}
Try resetting the output products and then regenerate them. And then re-implement the design and regenerate the hardware file.