vhdlghdl

In VHDL, I have an error when slicing an unsigned result

I can't get this line of code to work:

result <= (a * b)(31 downto 16);

The compiler (ghdl) suggests there's a missing ';' after the first ')'.

a, b and result are unsigned 16 bit.

How could I fix this?

Obviously I could do the multiplication first, then slice on a new line (it's happy with that).

Solution

  • It looks like the answer is in this post (suggested by @LHLaurini in the comments),

    Unfortunately, An expression can not be sliced:

    My research effort unfortunately fell short as I simply didn't understand what the problem was to be able to find the solution myself. Now that I understand what the problem was, I will simply have an intermediate step.