[SOLVED] Yosys/nextpnr timing report for Lattice ECP5 FPGA?

Yosys/nextpnr timing report for Lattice ECP5 FPGA?

I have a ECP5 project that I build using the commands below. How can I get a timing report for it (e.g. the max clock speed for that design)?

yosys -p "synth_ecp5 -top Test -json hardware.json" -q Blinky.v
nextpnr-ecp5 --25k --package CABGA256 --json hardware.json --textcfg hardware.config --lpf pinout.lpf -q --timing-allow-fail --force
ecppack --compress --db /Users/user/.apio/packages/tools-oss-cad-suite/share/trellis/database hardware.config hardware.bit

For a similar project with an ICE40 FPGAs I use the commands:

yosys -p "synth_ice40 -top main -json hardware.json" -q main.v
nextpnr-ice40 --hx8k --package tq144:4k --json hardware.json --asc hardware.asc --pcf main.pcf -q
icetime -d hx8k -P tq144:4k -C "/Users/user/.apio/packages/tools-oss-cad-suite/share/icebox/chipdb-8k.txt" -mtr hardware.rpt hardware.asc


// Reading input .asc file..
// Reading 8k chipdb file..
// Creating timing netlist..
// Timing estimate: 8.66 ns (115.52 MHz)

Solution

Adding a --report <file> flag to the nextpnr command line causes it to generate a json file with the max clock frequency. This information is also avaialble in the nextpnr output when run in a verbose mode.