I defined a 3-bit Carry Lookahead Adder module and tried concatenating it to first find the 2's complement of the second input, and then use that number to do addition with more of the 3-bit CLAs.
My code compiles without issue, but when I try to look at waveforms in VCD, some variables are shown in hexadecimal even though I did not explicitly use hexadecimal definitions anywhere. I'm trying to convert the display into signed decimals, but I don't know where to start. Here's the full testbench because I didn't know which cases to cut:
module CLA_15bit_tb ();
reg [14:0] A, B; // Inputs
reg mode; // mode (add or subtract)
wire [14:0] S ; // result
wire Ovf ; // Outputs are wires.
wire Cout;
CLA_15bit_top dut (A,B,mode,S,Cout,Ovf);
initial begin
$dumpfile("CLA_15bit_top.vcd");
$dumpvars(0,CLA_15bit_tb);
$display("Simulation started.");
A = 15'd0; // Set all inputs to zero.
B = 15'd0;
mode = 1'd0;
#10; // Wait 10 time units.
A = 15'd25;
B = 15'd50;
mode = 1'd0; // For addition
#10; // Wait 10 time units.
A = 15'd30;
B = 15'd100;
mode = 1'd1; // For subtraction
#10; // Wait 10 time units.
A = 15'd578;
B = 15'd421;
mode = 1'd0;
#10;
A = 15'd7865;
B = 15'd1065;
mode = 1'd1;
#10;
A = 15'd25000;
B = 15'd16000;
mode = 1'd0;
#10;
A = 15'd865;
B = 15'd1065;
mode = 1'd1;
#10;
A = 15'd32767;
B = 15'd32766;
mode = 1'd1;
#10;
$display("Simulation finished.");
$finish();
end
endmodule
You are confusing the value of signals with the representation used to display them. The representation can be in hexadecimal even if you used a decimal literal to assign the value. You do not need to "convert" anything, you can just change the settings of the waveform viewer to display values in decimal representation instead.