I'm facing an issue with the update event triggering in STM32G4 TIM1. I've configured TIM1 to generate PWM signals and set the update event to Center-Aligned Mode 1. However, I've noticed that the update event is occurring both when the timer's counter reaches the auto-reload value (ARR) and when it reaches zero. This is causing a problem because I specifically need the update event to occur only at ARR to trigger the ADC for sampling.
How can I ensure that the update event occurs only at ARR in this mode?
I have tested with up counting mode and it was triggered the ADC just when it reached to ARR value. But in Center aligned mode it sends the trigger signal in both overflow and underflow event.
I've finally found a solution:
I've configured an Additional PWM Channel – I set up another PWM channel in PWM generation no output mode and set its CCR to match the ARR. Set Trigger Output on Compare Match – I configured the timer to generate TRGO event when this channel's output compare match occurs.
Now the ADC trigger event occurs only on overflow events. This ensures that the ADC starts conversions at the center of the high pulses. Even if the timer period is shorter than the ADC's conversion time, the system simply skips some conversions but never starts one in the low pulse phase.