How would I relocate the ARM exception vectors?
Basically, I need to be able to remap them in a way, so when the ARM core tries to execute the vector, it should execute the custom exception vector that is stored in kernel's RAM bit and not in the ROM that is at 0x0. Is that possible? Or am I meant to route the interrupts to the kernel from the ROM?
So essentially, is there a way of telling the ARM core, "here is the new address for your vector table"? I know that you can start the CPU in the high vector mode, but that's not what I'm looking for. I need to be able to set the vector base to a custom address dynamically.
This is highly dependent on the core you're working with.
Cortex-M3 chips can change the base address using the Vector Table Offset Register (VTOR) in the System Control Block. Some implementations might restrict possible addresses.
Of the "traditional" chips (ARM7/9, Cortex-A/R), I think none allow you to specify an arbitrary base, although most of them can switch between 00000000 and FFFF0000, and a few allow to use the "start of RAM" address.
However, if the chip has MMU, you can usually map a RAM page at FFFF0000 and copy your handlers there. I believe that's what Linux does.