in my environment I have a signal that must not change between 2 time points. To verify it, I use expect
rule:
my_signal : uint;
event first_e; -- First time point
event second_e; -- Second time point
expect @first_e => {[0..]*(not {change(my_signal)}); @second_e} @clock;
The problem is that @second_e
and change(my_signal)
occurs on the same cycle (and it is OK) but the expect
rule fails.
Do you have an idea how can to resolve it? Maybe there is some way to specify event order or to tell that on the same cycle occurrence is OK?
Thank you for your help
your sequence does not specify that same cycle is OK.
try this:
event my_sig_change is change(my_signal)@clock;
expect @first_e => {[0..]* not @my_sig_change; @second_e or (@second_e and @my_sig_change) } @clock;