msp430code-composermsp432

MSP432p401r: What are the possible inputs to CTLW0->BRW?


The project I am working on includes i2c. I am looking through the datasheets and I cannot find how to use the prescaler setting, BRW. The section on this register does not tell me anything. It is here on the top of page 982. How does this register affect the SCL frequency?

Any help would be greatly appreciated!


Solution

  • Section 26.3.6 of the linked manual says:

    The 16-bit value of UCBRx in register UCBxBRW is the division factor of the eUSCI_B clock source, BRCLK. […] The BITCLK frequency is given by:

        fBitClock = fBRCLK/UCBRx

    The minimum high and low periods of the generated SCL are:

        tLOW,MIN = tHIGH,MIN = (UCBRx/2)/fBRCLK when UCBRx is even

        tLOW,MIN = tHIGH,MIN = ((UCBRx – 1)/2)/fBRCLK when UCBRx is odd