timerstm32pwmstm32f0

STM32F051 - Different idle state depending on overcurrent input

I have a STM32F051 driving a H-bridge (with proper gate drivers and overcurrent pulse sent back to the MCU) which power a transformer, using TIM1 and complementary signals (and dead time generation).

I am trying to configure a different "safe" state depending on which overcurrent pulse I receive:

Idea is to improve overcurrent performance on an inverter.

Is there a possibility to manually set the outputs of the timers to a defined state immediately when receiving a pulse on a GPIO ? I tried with the break function, but you can only set one predefined "safe" state. For my application I need two (for now, more to come).

Solution

  • In the end I found the result and I share it with you.

    The source code and examples of libopencm3 helped me to find the answer.

    #define TIM_CCMR1_OC1M_INACTIVE     (0x2 << 4)
#define TIM_CCMR1_OC1M_FORCE_LOW    (0x4 << 4)
#define TIM_CCMR1_OC1M_FORCE_HIGH   (0x5 << 4)
#define TIM_CCMR1_OC1M_PWM2         (0x7 << 4)

#define TIM_CCMR1_OC2M_INACTIVE     (0x2 << 12)
#define TIM_CCMR1_OC2M_FORCE_LOW    (0x4 << 12)
#define TIM_CCMR1_OC2M_FORCE_HIGH   (0x5 << 12)
#define TIM_CCMR1_OC2M_PWM2         (0x7 << 12)

    Utility functions to disable and enable outputs.

    void disable_pwm(){
    TIM1->CCER &= ~(TIM_CCER_CC1E | TIM_CCER_CC1NE | TIM_CCER_CC2E | TIM_CCER_CC2NE);
}

void enable_pwm(){
    TIM1->CCER |= (TIM_CCER_CC1E | TIM_CCER_CC1NE | TIM_CCER_CC2E | TIM_CCER_CC2NE);
}

    Here is how to force the H bridge to short the load to ground as an example.

    TIM1->CCMR1 &= ~TIM_CCMR1_OC1M_Msk;
TIM1->CCMR1 |= TIM_CCMR1_OC1M_FORCE_LOW;

TIM1->CCMR1 &= ~TIM_CCMR1_OC2M_Msk;
TIM1->CCMR1 |= TIM_CCMR1_OC2M_FORCE_LOW;

    Hope this will be useful to someone else!