I'm quite new to AVR and microcontroller programming. I don't quite understand some concepts in Timer/Counter. I found this problem when reading today:
Generate an active high 1 KHz digital waveform with 30 percent duty cycle from the OC1A (PB1) pin. Use the polling method to check the success of the output compare operation. The frequency of the clock is 16 MHz.
The solution given is this:
Solution: Setting the prescaler to 8, then the period of the clock signal to the TCNT will be 0.5 usec. The numbers of clock cycles that the signal is high and low are 600 and 1400, respectively.
I don't really understand why setting the prescaler to 8 would make the period of the clock signal 0.5 μsec? What is the math? Then, with that in mind, why would the number of clock cycles be 600 and 1400? Where do those numbers come from?
I think me not understanding the solution has something to do with not understanding the exact concept of prescaler. My understanding is that say the clock frequency is 16 MHz, if the prescaler is 8, then the output frequency would be 2 MHz. Please correct me if I'm wrong.
Yes, you are correct. A prescaler of 8 on 16 MHz reduces the frequency to 2 MHz. Each tick will be 1/2,000,000 of a second or 0.5 µs.
The question asks for a 1 kHz cycle, on 30% and off for 70%. 1/1 kHz is 1 ms or 1000 µs or 2000 ticks. 30% of that is 600 ticks, and the remaining 70% is 1400 ticks.