[SOLVED] Definition of target in Linux kernel's Makefile

Definition of target in Linux kernel's Makefile

I'm about to build linux kernel. Before moving to the build step, I have to configure the linux kernel with the command as below

make menuconfig

I can not find any definition of menuconfig in ./Makefile. I also grep-ed in the repo to look for the definition of the target and found nothing. So how does make runs some targets relating to Configuring the kernel like menuconfig, oldconfig, etc.

Solution

The kernel build system makes heavy use of GNU Make features. In the top-level Makefile, the rule for the menuconfig target is this one:

%config: outputmakefile scripts_basic FORCE
    $(Q)$(MAKE) $(build)=scripts/kconfig $@

That runs a sub-make for the target in "scripts/kconfig/Makefile". In "scripts/kconfig/Makefile", the rule for the menuconfig target is slightly obscured:

define config_rule
PHONY += $(1)
$(1): $(obj)/$($(1)-prog)
    $(Q)$$< $(silent) $(Kconfig)

PHONY += build_$(1)
build_$(1): $(obj)/$($(1)-prog)
endef

$(foreach c, config menuconfig nconfig gconfig xconfig, $(eval $(call config_rule,$(c))))