carmfpu

ARM Floating Point Operations

I have two questions regarding floating point operations regarding ARM Cortex M4, Cortex M33 and Cortex M0 core with floating point co-processor.

Though optional, almost all major ARM Cortex M4 and Cortex M33 implementation generally have a FPU built-in the core.

While Cortex M0 may have an FPU or Math co-processor as an peripheral.

My questions

  1. To use FPU for floating point operation do I have to use functions like __aeabi_fadd given in the link or simple mathematical operators like +, -, /, * will suffice.
    I believe Cortex M0 that may have an FPU or Math co-processor as an peripheral we will require such functions as in the case of RP2040 (Raspberry Pi Pico).

  2. Why do we have separate __aeabi_fsub and __aeabi_frsub, should reversing the parameters suffice or am I missing something.

    __aeabi_fsub 2 float float Return x minus y __aeabi_frsub 2 float float Return y minus x

Cortex M4

ARM Cortex M4

Cortex M33 ARM Cortex M33

Solution 
  • float fun1 ( float a )
{
    return(a+2.0F);
}
double fun2 ( double a )
{
    return(a+3.0);
}

arm-none-eabi-gcc -O2 -c -mcpu=cortex-m4 -mfpu=vfp -mfloat-abi=hard so.c -o so.o
arm-none-eabi-objdump -d so.o

so.o:     file format elf32-littlearm


Disassembly of section .text:

00000000 <fun1>:
   0:   eddf 7a02   vldr    s15, [pc, #8]   ; c <fun1+0xc>
   4:   ee30 0a27   vadd.f32    s0, s0, s15
   8:   4770        bx  lr
   a:   bf00        nop
   c:   40000000    .word   0x40000000

00000010 <fun2>:
  10:   ed9f 7b03   vldr    d7, [pc, #12]   ; 20 <fun2+0x10>
  14:   ee30 0b07   vadd.f64    d0, d0, d7
  18:   4770        bx  lr
  1a:   bf00        nop
  1c:   f3af 8000   nop.w
  20:   00000000    .word   0x00000000
  24:   40080000    .word   0x40080000

arm-none-eabi-gcc -O2 -c -mcpu=cortex-m4 so.c -o so.o

arm-none-eabi-objdump -d so.o

so.o:     file format elf32-littlearm


Disassembly of section .text:

00000000 <fun1>:
   0:   b508        push    {r3, lr}
   2:   f04f 4180   mov.w   r1, #1073741824 ; 0x40000000
   6:   f7ff fffe   bl  0 <__aeabi_fadd>
   a:   bd08        pop {r3, pc}

0000000c <fun2>:
   c:   b508        push    {r3, lr}
   e:   2200        movs    r2, #0
  10:   4b01        ldr r3, [pc, #4]    ; (18 <fun2+0xc>)
  12:   f7ff fffe   bl  0 <__aeabi_dadd>
  16:   bd08        pop {r3, pc}
  18:   40080000    .word   0x40080000


arm-none-eabi-gcc -O2 -c -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard so.c -o so.o
arm-none-eabi-objdump -d so.o

so.o:     file format elf32-littlearm


Disassembly of section .text:

00000000 <fun1>:
   0:   eef0 7a00   vmov.f32    s15, #0 ; 0x40000000  2.0
   4:   ee30 0a27   vadd.f32    s0, s0, s15
   8:   4770        bx  lr
   a:   bf00        nop

0000000c <fun2>:
   c:   b508        push    {r3, lr}
   e:   ec51 0b10   vmov    r0, r1, d0
  12:   4b03        ldr r3, [pc, #12]   ; (20 <fun2+0x14>)
  14:   2200        movs    r2, #0
  16:   f7ff fffe   bl  0 <__aeabi_dadd>
  1a:   ec41 0b10   vmov    d0, r0, r1
  1e:   bd08        pop {r3, pc}
  20:   40080000    .word   0x40080000