Am I right in saying that the VMLA.F32 instruction is fully equivalent to a F32 multiplication (complete with rounding step) followed by a F32 addition, including with respect to NaN payloads? (It seems like it, but the documentation is a bit terse and I would like to confirm.)
(and mutatis mutandis for F64)
Am I right in saying that the VMLA.F32 instruction is fully equivalent to a F32 multiplication (complete with rounding step) followed by a F32 addition...
For almost all practical purposes yes.
including with respect to NaN payloads?
Yes for quiet NaN, but for floating point exceptions no, including signalling NaN. For vmul.f32+vadd.f32, exception priority is specified by operation order, operation order by instruction order. But for multi-operation instructions like vmla.f32 and vfma.f32, it depends. From: https://developer.arm.com/documentation/ddi0406/c/Application-Level-Architecture/Application-Level-Programmers--Model/Floating-point-data-types-and-arithmetic/Floating-point-exceptions?lang=en
Some floating-point instructions specify more than one floating-point operation, as indicated by the pseudocode descriptions of the instruction. In such cases, an exception on one operation is treated as higher priority than an exception on another operation if the occurrence of the second exception depends on the result of the first operation. Otherwise, it is unpredictable which exception is treated as higher priority.
For example, a VMLA.F32 instruction specifies a floating-point multiplication followed by a floating-point addition. The addition can generate Overflow, Underflow and Inexact exceptions, all of which depend on both operands to the addition and so are treated as lower priority than any exception on the multiplication. The same applies to Invalid Operation exceptions on the addition caused by adding opposite-signed infinities. The addition can also generate an Input Denormal exception, caused by the addend being a denormalized number while in Flush-to-zero mode. It is unpredictable which of an Input Denormal exception on the addition and an exception on the multiplication is treated as higher priority, because the occurrence of the Input Denormal exception does not depend on the result of the multiplication. The same applies to an Invalid Operation exception on the addition caused by the addend being a signaling NaN.