cpu-architectureflagsinteger-overflowdigital-logicalu

How can I implement the overflow flag in Logisim without having access to the second last carry?


In the pic of the ALU, I've implemented the logic to calculate the zero, negative and carry flags. But I can't figure out how to implement the overflow flag without using the second last carry (carry-in for the MSB). Can someone please tell me how to implement the overflow flag here?enter image description here

The only help I could find online were instructions on how we could calculate it by taking XOR of the last two carries generated.


Solution

  • For addition:

    Look at the sign, MSB, of the two inputs, compare with the sign, MSB, of the output.

    If the sign of the two inputs are equal then the sign of the output should match, else signed overflow.

    If the signs of the two inputs differ, then no signed overflow is possible.

    This works because in some sense only one bit is lost: adding two n-bit inputs requires n+1 bits to hold the result without possibility for overflow.  In bringing that back to an n bit result we have the possibility of overflow, but it is fairly well constrained.

    Whereas with multiplication of two n bit numbers, we get 2n bit result without the possibility of overflow.  Bringing that back to an n bit result is more difficult to detect overflow since fully n bits of the result are being discarded.