armexecutable

Encoding and decoding ARM instructions to/ from binary

Task 1: Write the corresponding ARM assembly representation for the following instructions:

11101001_000111000001000000010000
11100100_110100111000000000011001
10010010_111110100100000011111101
11100001_000000010010000011111010 
00010001_101011101011011111001100

Task 2: Write the instruction code for the following instructions:

STMFA R13!, {R1, R3, R5-R11} 
LDR R11, [R3, R5, LSL #2]
MOVMI R6, #1536
LDR R1, [R0, #4]!
EORS R3, R5, R10, RRX

I have zero experience with this material and the professor has left us students out to dry. Basically I've found the various methods for decoding these instructions but I have three major doubts still.

  1. I don't have any idea on how to get started on decoding binary to ARM Instructions which is the first part of the homework.

  2. I can't find some of these suffixes for example on EORS what is the S? Is it the set condition bit? Is it set to 1 when there is an S in front of the instruction?

  3. I don't what to make of having multiple registers in one instruction line. Example:

     EORS R3,R5,R10,RRx

    I don't understand what's going on there with so many registers.

Any nudge in the right direction is greatly appreciated. Also I have searched the ARM manual, they're not very helpful for someone with no understanding of what they're looking for. They do have the majority of instructions for coding and decoding but have little explanation for the things I asked above.

Solution

  • If you have the ARM v7 A+R architecture manual (DDI0406C) there is a good table-based decode/disassembly description in chapter A5. You start at table A5.1 and and depending on the value of different bits in the instruction word it refers to more and more specific tables leading to the instruction.

    As an example, consider the following instruction:

    0001 0101 1001 1111 0000 0000 0000 1000

    According to the first table it is an unsigned load/store instruction since the condition is not 1111 and op1 is 010. The encoding of this is further expanded in A5.3

    From this section we see that A=0, op1=11001, Rn=1111 (PC), and B=0. This implies that the instruction is LDR(literal). Checking the page describing this instruction and remembering that cond=0001 we see that the instruction isLDRNE R0, [PC, #8].

    To do the reverse procedure you look up the instruction in the alphabetical list of instructions and follow the pattern.