Is there a naming convention for makefile targets and variables

I couldn't find anything in the GNU Makefile Conventions.

This is the implicit naming convention followed by GNU Makefile documentation:

Targets

Target names should use lower case letters. Words are separated with a hyphen - or not separated. E.g.:

test-debug:
    $(build_dir)/debug/bin

or

testdebug:
    $(build_dir)/debug/bin

Variables

Variables that are not special to make, and that are not inherited from the environment, should be in lowercase. Words should be separated with underscore symbol _. E.g.:

src_dir = $(CURDIR)/src
build_dir = $(CURDIR)/build

References:

Makefile style guide (based on GNU Makefile documentation)

GNU Makefile Standard Targets

• targets: you can find targets like install, install-strip, installcheck

• variables: you can read "This includes the directories specified as the values of the variables prefix and exec_prefix" within the install target documentation