assemblycomputer-sciencecpu-architecturelc3

How many bits will be available for the immediate value if there are 16 registers in the LC3


The LC-3 has 16 registers, each being 64 bits long, and 32-bit instructions. For the immediate value of an ADD instruction, how many bits are available? I understand that the minimum number of bits required to represent each register is 4 (log base 2 of 16), and since I have two registers (destination and first register to add), that would account to 4 + 4 bits. So 32 - 4 - 4 - 1 (the bit in the instruction that tells us to add the immediate value and the content in the first register together) = 23. Can I assume that the ADD instruction will always have 4 bits for its opcode, and do 23-4 to get 19 as my answer?


Solution

  • Your math is correct. If you need to encode a single source register, a destination register, a 4-bit opcode, an immediate-vs-register signal on 32 bits, you have 19 bits left for an immediate:

    32 - 4 - log_2(16) - log_2(16) - 1 = 19
    

    However I'm not sure where you're getting your numbers. The LC-3 architecture has 8 16-bit registers, and 16-bit instructions:

    16 - 4 - log_2(8) - log_2(8) - 1 = 5
    

    For "Can I assume that the ADD instruction will always have 4 bits for its opcode", the answer depends on what you're talking about. There's no assumption to be made, the LC-3 has fixed 4-bit opcode field. However, when changes are being made to an architecture (as you have in your question with the enlarged instructions and register file) changes could be made to opcode encoding.