mipspseudocode

MIPS Pseudo istructions, replacements


After making research what is it, I found out that it is simply replacment of way of getting same result. Correct me please if I'm wrong.

example:

move $s0, $t1

can be replaced with:

add $s0, $zero, $t1 

Questions:

How can be replaced lw, la, sw, bne?


Solution

  • Yes, the move instruction can and is replaced with an add instruction.

    Some background on pseudo instructions: MIPS is a RISC (Reduced Instruction Set Computer) architecture, meaning there is a relatively small number of instructions that you can use. This simplicity results in faster performance, but the trade-off is that more complicated operations require multiple instructions. Pseudo-instructions are "fake" instructions that represent one or more other more complex operations.

    Onto your question:

    lw, sw, and bne are not pseudo instructions. They are all executed by one MIPS assembly instruction.

    la, or Load Address, is a pseudo instruction. la can be broken down into a lui instruction and an ori instruction. On a 32-bit MIPS architecture, each instruction as well as the size of each register is 32 bits. So to store a 32-bit address, you must first grab the most significant (high order) 16 bits first, and then take the least significant (low order) 16 bits afterward.

    The lui Load Upper Immediate) takes the immediate field, shifts it left 16 times, and then stores it in a temporary assembler register. The ori instruction does a bitwise or on the temporary register and an immediate value and stores the full address in the initial register specified in the la instruction.

    Edit: To get the address of a string, for example, you might use this code segment in your function:

    la  $a0, msg    # pseudo-instruction to load the address of the label str
    

    You would also have msg defined elsewhere:

    .data               
    msg: .asciiz "This is a string"
    

    After running this example in SPIM, the la instruction gets translated into:

    lui $1, 4097 [msg]
    ori $4, $1, 0 [msg]
    

    $1 is the temporary assembler register and $4 is the register a0 which was the argument passed into the initial la instruction.

    References: MIPS Instruction Set and from just doing a lot of MIPS. Try running each instruction in a simulator like QTSPIM and see what you get.

    See also: lui 4097 and load address