system-veriloguvm

Can you use uvm_reg.get() on a volatile reg?


It's not clear to me what is supposed to happen when you use uvm_reg.get() to get the value of a register that contains one or more uvm_reg_field's that are volatile. I expected that uvm_reg.get() would be intelligent and do a backdoor read of the register since some of the fields are volatile and could have changed unbeknownst to the regmodel, but I'm not sure that is actually happening.

So what's the correct way to get the value of a register that contains one or more volatile uvm_reg_fields? Do I have to use uvm_reg.read()/uvm_reg.peek()? This seems a bit silly then because it means the test writer has to know which regs are volatile or not. I don't particularly care what regs are volatile, I just want to get their values.


Solution

  • I expected that uvm_reg.get() would be intelligent and do a backdoor read of the register

    No, get does the following, according to the UVM documentation:

    Return the desired value of the fields in the register.

    Does not actually read the value of the register in the design, only the desired value in the abstraction class.

    Use the uvm_reg::read() or uvm_reg::peek() method to get the actual register value.

    The "desired value" is not necessarily the same as the value in the design.