[SOLVED] Cannot create a clock signal on a Lattice ICE40 FPGA

Cannot create a clock signal on a Lattice ICE40 FPGA

I am trying to create a 1 Hz clock signal on a Lattice ICE40 FPGA. I am writing my code in Verilog and using the Lattice Radiant software. This 1 Hz clock signal is going to be used to create a square wave.

However, I don't get any output, either from the pin the clock signal is supposed to be on or from the pin that is supposed to output a square wave. I am sure I am checking the correct pins. I am also sure the code is downloading to the board. I believe the FPGA is not actually creating the clock signal for some reason.

Here is my code:

module square (clk, x, y, z);

// Inputs and Outputs
input clk; // The clock signal
output x, y, z; // The square wave output

// Type Declaration
reg x; // x is a register

// Initialize x
initial
    begin
        x = 0;
    end

// Run each time the clock transitions from low to high
always @(posedge clk)
    begin 
        x = !x; // Flip x
    end

// Outputs used to confirm the program is running   
assign y = 0; //39A
assign z = 1; //41A

endmodule

And here is my synthesis constraint file (.ldc):

create_clock -name {clk} -period 1000000000 [get_ports clk]

The period is defined in nanoseconds, so this a 1 Hz clock.

Thank you.

Solution

Thanks everyone. I did not realize I needed to create the clock myself. I have created a clock using a high speed oscillator function:

// Initialize the high speed oscillator
HSOSC clock (
    .CLKHFEN(1'b1), // Enable the output  
    .CLKHFPU(1'b1), // Power up the oscillator  
    .CLKHF(clk) // Oscillator output  
);

// Divide the oscillator down to 6 MHz
defparam clock.CLKHF_DIV = "0b11";

And it appears to be working.