xilinxvivado-hlsvitis

How to implement pipelined floating point accumulation in II=1 in Vitis/Vivado HLS?


I'm trying to implement a pipeline in Vivado HLS with an initiation interval (II) of 1 for a floating-point accumulation loop, but I'm encountering an II violation(Resource is not my concern, I really need to achieve II=1). Here's the code snippet I'm working with:

float test(float * A)
{
    float temp = 0.0;
    for(int i = 0; i < 100; i++)
    {
        #pragma HLS PIPELINE II=1
        temp += A[i];
    }

    return temp;
}

I would like to achieve a pipeline where each iteration of the loop is executed in every clock cycle. However, the HLS tool is reporting that it cannot meet the II=1 constraint. What changes should I make to my code to successfully implement the pipeline as intended?


Solution

  • It might be impossible to achieve II=1 because you're dealing with floating point numbers and an accumulation.

    A workaround could be to manually split the loop into parallel "branches" or write an adder tree.

    Side note: II=1 can be achieved using a fixed point representation, which is usually more than enough for most applications. In fact, HLS will most likely build an adder tree for you with II=1 if you're using a fixed point representation, even when accumulating.