How is data width determined for load/store instructions in Rocket Core?

I'm working on a project where we need to modify a Rocket-chip core with new instructions. We're wondering: how does data width for load/store instructions is determined ?

• For instance, LB/LH/LU have the same parameters set https://github.com/chipsalliance/rocket-chip/blob/master/src/main/scala/rocket/IDecode.scala#L88-L90
• LB/LH/LU have different encoding (for instance https://github.com/chipsalliance/rocket-chip/blob/master/src/main/scala/rocket/Instructions.scala#L277).

I assume the instruction decoder will determine the data width thanks to the funct3 field but I do not see where this operation is performed in the Rocket decoder.

Any idea?

Looking at the Github repository (links above) + grep

Found the answer by myself.

• The instruction in binary format is read here: https://github.com/chipsalliance/rocket-chip/blob/v1.6/src/main/scala/rocket/RocketCore.scala#L470

• https://github.com/chipsalliance/rocket-chip/blob/v1.6/src/main/scala/rocket/RocketCore.scala#L470. Bits 13 and 12 of the instruction are equal to the lowest bits of the func3 field which are different for each load width.

• The highest bit of the func3 field is needed for unsigned operations.