[SOLVED] Yosys optimizes away ring oscillator on ice40 FPGA

Yosys optimizes away ring oscillator on ice40 FPGA

Im trying to implement a simple ring oscillator for an ice40 FPGA using yosys (0.7) as follows:

module ringosc(input clkin,
               output out);

   (* keep="true" *)
   wire [100:0]              ring;

   assign ring[100:1] = ~ring[99:0];
   assign ring[0]     = ~ring[100];

   assign out = ring[0];

endmodule

However, it seems to get optimized away even though I am using the keep attribute. I can see this in the yosys log output:

7.14.2. Executing OPT_EXPR pass (perform const folding).
Replacing $_NOT_ cell `$auto$simplemap.cc:37:simplemap_not$292' (double_invert) in module `\lfsr' with constant driver `\trng.ring [62] = \trng.ring [60]'.
Replacing $_NOT_ cell `$auto$simplemap.cc:37:simplemap_not$293' (double_invert) in module `\lfsr' with constant driver `\trng.ring [63] = \trng.ring [59]'.
Replacing $_NOT_ cell `$auto$simplemap.cc:37:simplemap_not$294' (double_invert) in module `\lfsr' with constant driver `\trng.ring [64] = \trng.ring [58]'.
Replacing $_NOT_ cell `$auto$simplemap.cc:37:simplemap_not$295' (double_invert) in module `\lfsr' with constant driver `\trng.ring [65] = \trng.ring [57]'.
Replacing $_NOT_ cell `$auto$simplemap.cc:37:simplemap_not$296' (double_invert) in module `\lfsr' with constant driver `\trng.ring [66] = \trng.ring [56]'.
Replacing $_NOT_ cell `$auto$simplemap.cc:37:simplemap_not$297' (double_invert) in module `\lfsr' with constant driver `\trng.ring [67] = \trng.ring [55]'.
Replacing $_NOT_ cell `$auto$simplemap.cc:37:simplemap_not$298' (double_invert) in module `\lfsr' with constant driver `\trng.ring [68] = \trng.ring [54]'.
...

How can I prevent yosys from doing this?

Solution

Instantiate logic cells manually, like it is done in this example project: http://svn.clifford.at/handicraft/2015/ringosc/ [Archive]

wire [99:0] buffers_in, buffers_out;
assign buffers_in = {buffers_out[98:0], chain_in};
assign chain_out = buffers_out[99];
assign chain_in = resetn ? !chain_out : 0;

SB_LUT4 #(
    .LUT_INIT(16'd2)
) buffers [99:0] (
    .O(buffers_out),
    .I0(buffers_in),
    .I1(1'b0),
    .I2(1'b0),
    .I3(1'b0)
);

(The project is from this video I made in 2015:
https://www.youtube.com/watch?v=UFqWjZudOho)