fpgaice40

Arachne-pnr internal clk reference pin

I wanted to know the internal clk reference pin number to be added for arachne-pnr pcf file. I am synthesizing for Alchitry Cu Board having the iCE40 HX8k chip (supported by yosis and arachne). I couldnt understand the correlation between pin number in pcf file to pin of the chip...

If someone could give me an example pcf file for say a DFF (something using clock), I will figure out the remaining. I have searched for this in google but was unsuccessful.

I saw some reference on .gate... command but didn't understand whether it should be added to pcf file or some other file and compiled for clk output. If so, please give me that command example

Sorry, for the long question. Any help will be much appreciated.

Thanks, Bharat

Solution

  • pin numbers in the PCF are the same as package pin numbers. ".gate" is in the BLIF file generated by the synthesis tool and not something you put in the PCF.

    Also do note that arachne-pnr is now deprecated and largely unsupported, you should be using its successor nextpnr for open source place and route. Its handling of PCF issues should be better too.