I am trying to implement a MUX (Multiplexor) gate in the nand2tetris course. I first tried myself, and I got an error. But no matter what I changed I always got the error. So I tried checking some code online, and this is what most people use:
CHIP Mux {
IN a, b, sel;
OUT out;
PARTS:
Not(in=sel, out=nsel);
And(a=sel, b=b, out=c1);
And(a=nsel, b=a, out=c2);
Or(a=c1, b=c2, out=out);
}
But even when I try this code I still get the following error:
What I get as a truth table:
| a | b | sel | out |
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 0 |
What I should get:
| a | b | sel | out |
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 |
I have the newest software suite per 2020-01-13
From what can be seen your input pins are:
a = 0
b = 1
sel = 1
Your internal pins are:
nsel = 1
c1 = 1
c2 = 0
All as expected so far.
Expected out = 1
in this case and you get out = 0
. Test script stops at this point because of failure.
Now there might be two reasons of that:
1) you didn't load correct Mux.hdl
and because if you calculated Or(c1,c2)
you would get 1 which is correct. If you placed And
gate in place of Or
it would explain failure
2) your implementation of Or.hdl
is incorrect.Mux uses your version of Or
gate if such file is present in the same directory.
So first verify your code in Hardware Simulator, then verify your implementation of Or.hdl
. The latter you could do by removing temporarily Or.hdl
from project directory. Hardware Simulator would load built-in version of Or
gate.